SAA6588

SAA6588, Elektronika i elektryka, Serwisówki
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INTEGRATED CIRCUITS
DATA SHEET
SAA6588
RDS/RBDS pre-processor
Product specification
File under Integrated Circuits, IC01
1997 Sep 01
Philips Semiconductors
Product specification
RDS/RBDS pre-processor
SAA6588
FEATURES
·
Integrated switched capacitor filters
·
Demodulation of the European Radio Data System
(RDS) or the USA Radio Broadcast Data System
(RBDS) signal
·
RDS and RBDS block detection
·
Error detection and correction
The RDS/RBDS pre-processor is a CMOS device that
integrates all RDS/RBDS relevant functions in one chip.
The IC contains filtering and demodulation of the
RDS/RBDS signal, symbol decoding, block
synchronization, error detection, error correction and
additional detectors for multi-path, signal quality and audio
signal pauses. The pre-processed RDS/RBDS information
is available via the I
2
C-bus.
·
Fast block synchronization
·
Synchronization control (flywheel)
·
Mode control for RDS/RBDS processing
·
Different RDS/RBDS block information output modes
(e.g. A-block output mode)
Fast I
2
C-bus interface
·
The RDS/RBDS pre-processor replaces a number of ICs
and peripheral components used nowadays in car radio
concepts with RDS or RBDS features. The integration of
the relevant RDS/RBDS data processing functions
provides, in an economic manner, high performance of
RDS/RBDS processing and reduces the real-time
requirements for the main radio microcontroller
considerably. In addition it simplifies the development of
the RDS specific software for the main controller of the
radio set.
·
Multi-path detector
·
Signal quality detector with sensitivity adjustment
·
Pause detector with pause level and time adjustment
·
Alternatively oscillator frequency: n
´
4.332 MHz
(n = 1 to 4)
·
UART compatible with 17.328 MHz (n = 4)
·
CMOS device
·
Single supply voltage
·
Extended temperature range (
-
40 to +85
°
C).
Compared with standard radio systems, RDS/RBDS
controlled radio systems additionally require an
RDS/RBDS demodulator with a 57 kHz band-pass filter,
information about the current reception situation (reception
quality, multi-path disturbance etc.), and additional
microcontroller power for RDS/RBDS data processing,
decoding and radio control.
GENERAL DESCRIPTION
Today most FM radio stations in Europe and meanwhile
also many FM/AM radio broadcasting stations in the USA
transmit the inaudible European RDS (Radio Data
System) or the USA RBDS (Radio Broadcast Data
System) informations respectively. Likewise nowadays
receivers, most car radios and also some home and
portable radios on the market include at least some of the
RDS features.
The RDS/RBDS system offers a large range of
applications by its many functions to be implemented. For
car radios the most important are:
·
The new RDS/RBDS pre-processor includes all these
specific functions and meets all requirements of a high end
RDS/RBDS radio. Moreover the timing requirements of the
set controller, regarding RDS/RBDS data processing are
reduced due to the integration of decoder functions, so
that the development of radio control software can be
concentrated specifically on radio set features.
Program Service (PS) name
·
Traffic Program (TP) identification
·
Traffic Announcement (TA) signal
·
Alternative Frequency (AF) list
·
Program Identification (PI)
·
Enhanced Other Networks (EON) information.
1997 Sep 01
2
Philips Semiconductors
Product specification
RDS/RBDS pre-processor
SAA6588
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DDA
analog supply voltage
4.5
5.0
5.5
V
V
DDD
digital supply voltage
4.5
5.0
5.5
V
I
DD(tot)
total supply current
-
14.0
-
mA
V
i(MPX)
RDS input sensitivity at pin MPX
1
-
-
mV
D
G
SQ
step size for signal quality input gain
-
0.6
-
dB
CR
GSQ
control range for signal quality input gain
-
18.6
-
dB
t
PON(min)
minimum time for pause
adjustable in 4 steps 20.2
-
161.7 ms
f
i(xtal)
crystal input frequency
n = 1
-
4.332
-
MHz
n=2
-
8.664
-
MHz
n=3
-
12.996
-
MHz
n=4
-
17.328
-
MHz
ORDERING INFORMATION
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
SAA6588
DIP20
plastic dual in-line package; 20 leads (300 mil)
SOT146-1
SAA6588T
SO20
plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
1997 Sep 01
3
560 pF
+
5 V
C9
100 nF
C10
SCOUT
CIN
V
DDD
18
19
7
multiplex
input
C1
330 pF
MPX
16
57 kHz
8th ORDER
BAND-PASS
CLOCKED
COMPARATOR
RDS/RDBS
DEMODULATOR
RDS/RDBS
DECODER
8
DAVN
data
available
C2
0.47
m
F
audio
inputs
C3
0.47
m
F
11
2
PSWN
MPTH
pause
output
multi-path
output
10
k
W
R2
SAA6588
10
k
R3
W
AFIN
13
PAUSE
DETECTOR
MULTI-PATH
DETECTOR
SIGNAL QUALITY
DETECTOR
4
INTERFACE
REGISTER
5
C11
4
level
input
LVIN
20
2.2 nF
V
DDA
POWER
SUPPLY
AND RESET
9
SDA
14
TEST
CONTROL
OSCILLATOR
AND CLOCK
I
2
C-BUS SLAVE
TRANSCEIVER
I
2
C-BUS
+
5 V
10
SCL
C8
100 nF
15
17
3
1
5
4
6
12
V
SSA
V
ref
TCON
MRO
OSCI
OSCO
V
SSD
MAD
C7
2.2
R4
R1
m
F
C6
Q1
1 k
W
470
k
100
nF
W
n
´
4.332
MHz
n = 1 to 4
MGK535
C4
47 pF
C5
82 pF
Fig.1 Block diagram.
Philips Semiconductors
Product specification
RDS/RBDS pre-processor
SAA6588
PINNING
SYMBOL PIN
DESCRIPTION
SYMBOL PIN
DESCRIPTION
MRO
1 multi-path rectifier output
PSWN
11 pause switch output (active LOW)
MPTH
2 multi-path detector output
MAD
12 slave address (LSB) input
TCON
3 test control input pin
AFIN
13 audio signal input
OSCO
4 oscillator output
V
DDA
14 analog supply voltage (5 V)
OSCI
5 oscillator input
V
SSA
15 analog ground (0 V)
V
SSD
6 digital ground (0 V)
MPX
16 multiplex input signal
V
DDD
7 digital supply voltage (5 V)
V
ref
17 reference voltage output
DAVN
8 data available output (active LOW)
SCOUT
18 band-pass filter output
SDA
9 I
2
C-bus serial data I/O
CIN
19 comparator input
SCL
10 I
2
C-bus serial clock input
LVIN
20 level input
handbook, halfpage
MRO
1
20
LVIN
handbook, halfpage
MRO
1
20
LVIN
MPTH
2
19
CIN
MPTH
2
19
CIN
TCON
3
18
SCOUT
TCON
3
18
SCOUT
OSCO
4
17
V
ref
OSCO
4
17
V
ref
OSCI
5
16
MPX
SAA6588T
OSCI
5
16
MPX
V
SSD
6
15
V
SSA
SAA6588
V
SSD
V
DDD
6
15
V
SSA
V
DDA
V
DDD
7
14
V
DDA
7
14
DAVN
8
13
AFIN
DAVN
8
13
AFIN
SDA
9
12
MAD
SDA
9
12
MAD
SCL
10
11
PSWN
SCL
10
11
PSWN
MGK534
MGK533
Fig.2 Pin configuration (DIP20).
Fig.3 Pin configuration (SO20).
1997 Sep 01
5
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